74LS107 JK Negative Edge Triggered Flip-Flop IC – Datasheet

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The 74LS107 is a JK Flip-Flop with individual J, K, Direct Clear, and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. The 74LS107 IC has a wide range of working voltage, a wide range of working conditions, and directly interfaces with CMOS, NMOS, and TTL.

74ls107 ic

What is a JK Flip-Flop?

The JK Flip Flop is basically a gated RS flip flop with the addition of the clock input circuitry. When both the inputs S and R are equal to logic “1”, the invalid condition takes place. Thus to prevent this invalid condition, a clock circuit is introduced. The JK Flip Flop has four possible input combinations because of the addition of the clocked input. The four inputs are “logic 1”, ‘logic 0”. “No change’ and “Toggle”.

74LS107 Pinout

74ls107 pinout

74LS107 Pin Configuration

Pin NoPin NameDescription
1J1Input Pin J1
2Q1Active high Output pin 1
3Q1′Active low Output pin 1
4K1Input Pin K1
5Q2Active high Output pin 2
6Q2′Active low Output pin 2
7GND Ground Pin
8J2Input Pin J2
9CP2Clock Pulse Input Pin 2
10CD2Reset Pin 2
11K2Input Pin K2
12CP1Clock Pulse Input Pin 1
13CD1Reset Pin 1
14VCCSupply Voltage

74LS107 Features & Specifications

  • Technology Family: LS
  • Dual JK Flip Flop Package IC
  • -ve edge triggered
  • VCC (Min): 4.75V
  • VCC (Max): 5.25
  • Bits (#): 2
  • Operating Voltage (Nom): 5V
  • Frequency at normal voltage (Max): 35MHz
  • Propagation delay (Max): 20ns
  • IOL (Max): 8mA
  • IOH (Max):-0.4mA
  • Rating: Catalog
  • Available in 14-pin PDIP, GDIP, PDSO packages

Applications

  • They are used in digital clocks, electronic meters, and other electronic devices that display numerical information.

You can download this Datasheet for 74LS107 JK Negative Edge Triggered Flip-Flop from the link given below:

See Also: 74LS02 Quad Two Input NOR Gate| 7407 Hex Buffer IC | 74LS25 Dual 4 – Input NOR Gate IC with Strobe