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MC3486 Quad Line Receiver, Three-State features four Independent receiver chains which comply with ELA Standards for the Electrical Characteristics Of Balanced/unbalanced Interface Circuit. A PNP device buffers each output control pin to assure minimum loading for either logic one Or logic zero inputs. In addition. each receiver chain has internal hysteresis circuitry to W)prove noise margin and discourage Output instability for slowly changing input waveforms.
MC3486 Pinout
MC3486 Pin Configuration
Pin No | Pin Name | Description |
---|---|---|
1 | IN A1 | Input Pin A1 |
2 | IN A2 | Input Pin A2 |
3 | OUTA | Output Pin A |
4 | 3-STATE CONTROL | 3-State Control Pin |
5 | OUT C | Output Pin C |
6 | IN C1 | Input Pin C1 |
7 | IN C2 | Input Pin C2 |
8 | GND | Ground Pin |
9 | IN D1 | Input Pin D1 |
10 | IN D2 | Input Pin D2 |
11 | OUT D | Output Pin D |
12 | 3-STATE CONTROL | 3-State Control Pin |
13 | OUT B | Output Pin B |
14 | IN B1 | Input Pin B1 |
15 | IN B2 | Input Pin B2 |
16 | VCC | Collector Supply Voltage |
MC3486 Key features
- Four Independent Receiver Chains
- ThreeState Outputs
- High Impedance Output Control Inputs (PIA Compatible)
- internal Hysteresis — 30 mV (Typical) Zero Vons Common
- Fast Propagation Times 25 nS (Typical)
- TTL compatible
- Single 5.0 V Supply Voltage
You can download this datasheet for MC3486 Quad Line Receiver, Three-State from the link given below: