CD4059 Programmable Divide-by-N Counter

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The CD4059 is a CMOS programmable Divide-by-N Counter that can be programmed to divide an input frequency by any number “N” from 3 to 15,999. The down-counter is preset by means of 16 jam inputs. The three Mode-Select Inputs Ka, Kb, and Kc determine the modulus (divide-by number) of the first and last counting sections in accordance with the truth table. The IC offers a wide array of features and in directly interfaceable with TTL, CMOS, and NMOS devices. CD4059 offers a wide array of features such as ESD Barring and low thermal dissipation.

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What is a Divide by N Counter?

Divide by N counter is a simple generic counter that can divide the input clock frequency by a factor of N. for example, in the case of a divide by 2 counter (N=2), if you cascade four D flip-flops, then the output of every stage is divided by 2, if you are taking the output from the 4th flip-flop, then its output clock frequency is equal to 16 (2^4).

CD4059 Key Features

Fully static operation
Master preset initialization
Latchable ÷N output
Quiescent current specified to 15V
Green product and no Sb/Br

CD4059 Pinout

Pin No	Pin Name	Description
1	CL	clock input
2	L	latch input signal
3	J1	jam input 1
4	J2	jam input 2
5	J3	jam input 3
6	J4	jam input 4
7	J16	jam input 16
8	J15	jam input 15
9	J14	jam input 14
10	J13	jam input 13
11	Kc	mode selection input c
12	VSS	source supply
13	Kb	mode selection input b
14	Ka	mode selection input a
15	J12	jam input 12
16	J11	jam input 11
17	J10	jam input 10
18	J9	jam input 9
19	J8	jam input 8
20	J7	jam input 7
21	J6	jam input 6
22	J5	jam input 5
23	VOUT	output pin
24	VDD	Drain supply

Application

Communications & Networking, Clock & Timing
Fixed or programmable frequency division
Programmable divide by N-counter in FM and citizen brand transceiver digital tuners