8255 Programmable Peripheral I/O – Datasheet

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The 8255A is a general-purpose programmable l/O device designed for use with Intel microprocessors. It has 24 O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. In the first mode (MODE 0), each group of 12 /0 pins may be programmed in sets of 4 to be input or output. In MODE1, the second mode, each group may be programmed to have 8 lines of input or output.

8255 Pinout

8255 Pin Configuration

Pin NumberPin NameDescription
1-4PA0-PA3 Port A
5RD Read (Active Low)
6CS Chip Select (Active Low)
7GND Ground
8A0 Address Input
9A1 Address Input
10-17PC0-PC7 Port C
18-25PB0-PB7 Port B
26Vcc +5V Power Supply
27-34D0-D7 Data Bus
35RESET Reset Input
36WR Write (Active Low)
37-40PA4-PA7 Port A

8255 Key Features

  • MCS-85TM Compatible 8255A-5
  • 24 Programmable l/O Pins
  • Completely TTL Compatible
  • Fully Compatible with Intel Microprocessor Families
  • Improved Timing Characteristics
  • Direct Bit Set/Reset Capability Easing Control Application Interface
  • Reduces System Package Count
  • Improved DC Driving Capability

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