CD4522 Programmable BCD Divide-by-N Counter

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CD4522 is a part of the CD4000 IC series. CD4522 is a Programmable BCD Divide-by-N Counter IC. This programmable BCD counter IC has a decoded “O” state output for divide-by-N applications. In single-stage operation, the “O” output is tied to the Preset Enable input. The IC offers cascading feedback feature that allows multiple stage divide-by-N operation without any external gating. A HIGH on the clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The IC is always available in a 16-pin hermetically sealed package. CD4522 offers features such as ESD barring and thermal overload protection, making it ideal to be used for several logic design/DLD applications.

What is a Divide by N Counter?

Divide by N counter are simple generic counter that can divide the input clock frequency by a factor of N. for example, in the case of a divide by 2 counter (N=2), if you cascade four D flip-flops, then the output of every stage is divided by 2, if you are taking the output from the 4th flip-flop, then its output clock frequency is equal to 16 (2^4).

CD4522 Key Features

Internally synchronous for high internal and external speeds.
Logic edge clocked design increments on positive Clock transition or on negative Clock Inhibit transition.
100% tested for quiescent current at 20-V.
5-V, 10-V, and 15-V parametric ratings.
Standard symmetrical output characteristics.

CD4522 Pinout

Pin No	Pin Name	Description
1	Q3	Output 3 of Counter
2	P3	Preset Input 3
3	PE	Preset Enable Pin
4	INHIBIT	Inhibit OR Disable pin
5	P0	Preset Input 0
6	CLK	Clock Signal Pin
7	Q0	Output 0 of Counter
8	VSS	Source Supply
9	Q1	Output 1 of Counter
10	RESET	Reset Pin
11	P1	Preset Input 1
12	“0”	Zero Output Pin
13	CF	Cascade Pin
14	P2	Preset Input 2
15	Q2	Output 2 of Counter
16	VDD	Drain Supply