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The 8251 MegaCore function provides an interface between a microprocessor and a serial communications channel. The 8251 receives and transmits data in a variety of configurations including 7- or 8-bit data words, with odd, even, or no parity and 1 or 2 stop bits.
8251 Pinout
8251 Pin Configuration
Pin Number | Pin Name | Description |
---|---|---|
1 | D2 | Data Bit 2 |
2 | D3 | Data Bit 3 |
3 | RX | Receive |
4 | GND | Ground |
5 | D4 | Data Bit 4 |
6 | D5 | Data Bit 5 |
7 | D6 | Data Bit 6 |
8 | D7 | Data Bit 7 |
9 | TXC | Transmit Clock Input (Active Low) |
10 | WR | Write (Active Low) |
11 | CS | Chip Select (Active Low) |
12 | C/D | Command/Data Select |
13 | RD | Read (Active Low) |
14 | RXRDY | Read Register Ready |
15 | TXRDY | Transmitter Register Ready |
16 | SYNDET/BD | See Data Sheet |
17 | CTS | Clear To Send (Active Low) |
18 | TXEMPTY | Transmitter Register Empty |
19 | TXD | Transmit Output |
20 | CLK | Clock |
21 | RESET | Reset |
22 | DSR | Data Set Ready (Active Low) |
23 | RTS | Request to Send (Active Low) |
24 | DTR | Data Terminal Ready (Active Low) |
25 | RXC | Receive Clock (Active Low) |
26 | Vcc | Positive Supply |
27 | D0 | Data Bit 0 |
28 | D1 | Data Bit 1 |
8251 Key Features
- 8251 MegaCore function that provides an interface between a microprocessor and a serial communication channel
- Optimized for FLEX architecture
- Programmable word length, stop bits, and parity
- Offers divide-by-1, -16, or -64 mode
- Supports synchronous and asynchronous operation
You can download this datasheet for 8251A USART – Datasheet from the link given below: