81C55 RAM I/O Port Timer – Datasheet

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The 81C55 has 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It uses silicon gate CMOS technology and consumes a standby current of 100 microamperes, maximum, while the chip is not selected. Featuring a maximum access time of 400 ns, the 81C55 can be used in an 80C85 system without using wait states.

The parallel I/O consists of two 8-bit ports and one 6-bit port (both general purpose). The 81C55 also contains a 14-bit programmable counter/timer which may be used for sequence-wave generation or terminal count-pulsing.

81C55 Pinout

81C55 Pin Configuration

Pin NumberPin NameDescription
1PC3 Port C
2PC4 Port C
3TIMER IN Timer Input
4RESET Reset
5PC5 Port C
6TIMER OUT Timer Output (Active Low)
7IO/M Internal Memory Select
8CE Chip Enable (Active Low)
9RD Read (Active Low)
10WR Write (Active Low)
11ALE Address Latch Enable
12-19AD0-AD7 Address Data Bus
20GND Ground
21-28PA0-PA7 Port A
29-36PB0-PB7 Port B
37-39PC0-PC2 Port C
40Vcc Positive Voltage Supply

81C55 Key Features

  • High speed and low power achieved with silicon gate CMOS technology
  • 256 words x 8bits RAM
  • Single power supply, 3 to 6 V
  • Completely static operation
  • On-chip address latch
  • 8-bit programmable I/O ports (port A and B)
  • TTL Compatible
  • RAM data hold characteristic at 2 V
  • 6-bit programmable I/O port (port C)
  • 14-bit programmable binary counter/timer
  • Multiplexed address/data bus

You can download this datasheet for 81C55 RAM I/O Port Timer – Datasheet from the link given below: